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FPGA IP Verification Engineer - Summer Trainee (Kraków)

Kraków, Krakow, Polska, 30-348
40d
Salary to be agreed
Full-time / Internship • Hybrid • IT & Telecommunications

Key offer highlights

  • Hybrid model - partly remote

  • Full-time

  • Employment: contract of employment

Description

Summer Trainee is a short-term paid internship, that allows you to kickstart your fabulous journey in the Semiconductor and Telecom world. As our Trainee you can get your first experience and learn from the best experts in this field. The internship usually lasts 3 months from July to September. We are open to offering the best talents a chance to continue working with us. #OpenToYou. Position: FPGA – Summer Trainee Duration: 3 months Location: Poland, Kraków (hybrid)Date: 1.07.2026 – 30.09.2026

About Nokia

  • Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we’re advancing connectivity to secure a brighter world.

  • Our recruitment process

  • We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect.

  • If you’re interested in this role but don’t meet every listed requirement, we still encourage you to apply. Unique backgrounds, perspectives, and experiences enrich our teams, and you may be just the right candidate for this or another opportunity.

  • The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates. Discover more about the recruitment process at Nokia.

Requirements

  • Active student status

  • Good English, both spoken and written

  • Willingness to work full-time during the summertime

  • Understanding of Digital Design

  • Understanding FPGA technology

  • Knowledge of System Verilog/Verilog/VHDL

  • Good communication skills

  • Team player spirit

  • Academic background in Digital Design

  • Academic background in OO analysis and design

  • Academic background in Telecommunication

  • Basic knowledge about agile methodology

Zakres obowiązków

  • Functional verification, including creation and/or development of test benches

  • Formal verification of the IP components and/or subsystems

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